Sega 32X Manual download pdf (Page 78)

VDP Register

SH2 (Read/Write): 5 wait (const)

68K (Read): 2 wait (const)

68K (Write): 0 wait (const)

System Register

SH2 (Read/Write): 1 wait (const)

68K (Read/Write): 0 wait (const)

Boot ROM

SH2 (Read): 1 wait (const)

SDRAM Access Time

The 32X SDRAM is specialized for the "replace" in the case of the SH2 cache miss, and

read transfers in the 8 word busrts mode* while write transfers in the 1 word single mode.

Access time is fixed at the following values :

Read: 12 Clock / 8 Word

Write: 2 Clock / 1 Word

* : 8-Word burst mod of read is a read operation that takes data in batches of 8 word components

from the first address specified by the word address. Because 8 word corresponds to a single line

cache, there will be conformity when a cache miss-hit occurs and line data is replaced. But when

the SDRAM is read using cache-through, even if the data to be read is only a single word, the

access operation to the SH2 SDRAM is 8-word-burst-read-fixed, and action time is required by

that amount.

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Sega 32X Manual Page 78