Sega 32X Manual Page 16
- Page / 102
- Table of contents
- BOOKMARKS
Rated. / 5. Based on customer reviews
16
ROM Access when using the 32X
The 68000 vector area (00 0000h - 00 00FFh) is assigned by the custom built-in ROM.
Because the ROM contents are 88 0200h, 88 0206h, 88 020Ch, … . After 88 0200h (200h
of the cartridge ROM), 6-byte JUMP commands are arranged into a jump table.
Only when th RV (ROM to VRAM DMA) bit is 1 is it assigned by the cartridge ROM to
100h - 3F FFFFh. ROM access from the SH2 at this time waits until 68000 rewrites the
RV bit to 0.
When the RV bit is 0 access is from 88 0000h - 9F FFFFh to the cartridge ROM. 88
0000h - 8F FFFFh is allocated by fixing 00 0000h - 7F FFFFh (4Mbit) of the cartridge
ROM. In 90 0000h - 9F FFFFh, a cartridge area of 32Mbits is divised into 4 banks and
accessed by the bank set register.
When the 68000 and SH2 are accessed at the same time, the SH2 has priority. Otherwise
access is granted on a first come, first served basis : the second access waits until the first
is over.
When the 68000 and SH2 access the same area at the same time, the SH2 has priority.
Otherwise access is granted on a first come, first served basis : the second access waits
until the first is over.
The MEGA Drive has a bank set register (A1 30F1h - A1 30FFh odd numbered
addresses) for coping with a cartridge ROM that exceeds 32Mbits. The RV bit should be
set to "1" beforehand when accessing here.
Access to the 32X VDP
The FM (VDP access authorization) bit number must be 0 before the MEGA Drive can
access the Mars frame buffer, overwrite images, VDP register or color palette. When the
bit is 1, reads are undefined and writes are ignored. Color palette access is words only, not
bytes.
The frame buffer, overwrite image, VDP register, and color palette can be accessed from
the MEGA Drive side only when the FM (VDP access authorization) bit is 0. . When the
bit is 1, reads are undefined and writes are ignored. Color palette access is words only, not
bytes.
- Hardware Manual 1
- Doc. #MAR-32-R4-072294 1
- Terminology 4
- Contents 5
- 1. Introduction to 32X 7
- New Screen Offered 8
- New Sounds Offered 8
- High-Speed Microprocessor 8
- Development Language 8
- 2. Configuration 9
- Figure 2.1 32X Block Diagram 10
- MEGA Drive I/F Component 11
- 32X Cartridge Component 11
- SH2 Component 11
- SDRAM Component 12
- Frame Buffer Component 12
- VDP Component 12
- Color Palette Component 13
- PWM Component 13
- 3. Functions 14
- MEGA Drive Memory Map 15
- ROM Access when using the 32X 16
- Access to the 32X VDP 16
- SH2 Memory Map 17
- Figure 3.2 SH2 Memory Map 17
- Cache Area Access 18
- Cartridge ROM Access 18
- 32X VDP Access 18
- 1.5. Registers 19
- Using the 32X 21
- Interrupt issued for SH2 22
- Switches ROM Cartridge Bank 22
- (Acces : Word) 24
- (Access : Word) 24
- (Acces: Byte/Word) 25
- (Access : Byte/Word) 25
- (Access: Byte/Word) 26
- [SH2 side] 28
- (Access : Byte/Word) 28
- PWM Interrupt Clear Register 30
- (Access : Word) 32
- VDP Registers 36
- 1.6. VDP 39
- Figure 3.4 32X VDP Mapping 41
- Switching Frame Buffers 42
- Figure 3.7 Over Write Image 45
- Line Table Format 47
- Figure 3.8 Line Table Format 47
- Priority 48
- Figure 3.9 Priority 48
- Direct Color Mode 49
- Figure 3.10 Direct Color Mode 49
- Packed Pixel Mode 50
- Figure 3.11 Packed Pixel Mode 50
- Screen Shift Control 51
- Run Length Mode 52
- Figure 3.13 Run Length Mode 52
- FILL Function 53
- Before Fill 53
- After Fill 53
- Mega Drive Master Clock Cycle 54
- 68000 Clock Cycle 54
- SH2 Clock Cycle 54
- VDP Register Latch Timing 56
- 1.7. PWM 57
- Master and Slave 62
- Note 2 : See next page 63
- Figure 3.25 SH2 Address 64
- V: valid bit 64
- Purge (Cache Initialization) 66
- CPU Write 67
- Flow of Data 67
- Master-Slave Communication 68
- Communication Port 69
- CMD Interrupt 69
- 4. 32X Block Access 72
- SH2 Address Space 73
- Cache-through Access 74
- VDP Access Competition 74
- ROM Access Competition 74
- Competition with other CPUs 76
- Frame Buffer Access 76
- 32X Mode and Cartridge ROM 77
- Frame Buffer 77
- VDP Register 78
- System Register 78
- Boot ROM 78
- SDRAM Access Time 78
- 5. Other 79
- Initial Program 83
- Security 83
- 6. Annexes 88
- 1.16. Master Boot ROM 89
- 1.17. Initial program 95
© 2020, manymanuals.com. All rights reserved. | 1.096 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Comments to this Manuals