Sega 32X Manual Page 11

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1.3. About the 32X Block
The role and features of each 32X block shown in section 2.1 is explained below. See
chapter 3 for more information.
MEGA Drive I/F Component
This is an interface connecting the 32X to the MEGA Drive. The 32X hardware resources
(graphics, sound, and coomunication with SH2) and cartridge ROM are mapped through
the MEGA Drive I/F in the MEGA Drive main CPU (68000) address space.
32X Cartridge Component
The content of the ROM ROM cartridge installed in the 32X cartridge slot can be read
from both the 32X CPU SH2 side and the MEGA Drive side 68000 (and Z80).
Nevertheless, SH2 has priority when conflict vetween the two exists.
SH2 Component
These are two SH2 chips as main CPUs mounted in the 32X, and the cartridge ROM is
connected with the 32X hardware ressources (graphics, sound, and communication to
68000) on a common bus. The 2 SH2 units are fixed to the master and slave by packaged
conditions; the normal master gest bus authorization and slave gets bus authorization after
obtaining permission of the master at the time of the bus access.
MEGA Drive hardware cannot map in SH2 address space. Consequently, MEGA Drive
information is indirectly received by communication with the 68000. The 32X has a
control register that issues interrupts from 68000 to SH2, a FIFO register that can send
data written from the 68000 to the DMA built-in the SH2, and a register that is able to
read and write from both the 68000 and SH2, and reads data written from the 68000.
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